Compal Notebook Manual do Utilizador Página 9

  • Descarregar
  • Adicionar aos meus manuais
  • Imprimir
  • Página
    / 36
  • Índice
  • MARCADORES
  • Avaliado. / 5. Com base em avaliações de clientes
Vista de página 8
Maintenance and Service Guide,Service Manual,Motherboard Schematics for Laptop/notebook http://mycomp.su/x/
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FSC
CLK_XTAL_IN
VGATE
CLK_XTAL_OUT
ITP_EN
H_STP_CPU#
CLK_XTAL_OUT
CLK_XTAL_IN
PCI2_TME
ITP_EN PCI2_TME
CLK_SMBDATA
CLK_SMBCLK
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_CPU_HPLCLK
CLK_CPU_HPLCLK#
CPU_SSCDREFCLK
CPU_SSCDREFCLK#
WLAN_CLKREQ#
WWAN_CLKREQ#
CLK_SMBDATA
PCI4_SEL
PCI4_SEL
CLK_PCI_DDR_R
CLK_CPU_EXP
CLK_CPU_EXP#
CLK_PCIE_PCH#
CLK_PCIE_PCH
CLK_PCIE_LAN
CLK_PCIE_LAN#
WLAN_CLKREQ#
LAN_CLKREQ#
LAN_CLKREQ#
CLK_SMBCLK
FSB
H_STP_PCI#_R
+1.05VM_1.5VM_R
CLK_PCIE_WLAN#
CLK_PCIE_WLAN
CLK_PCIE_WWAN#
CLK_PCIE_WWAN
CLK_PCIE_SATA
CLK_PCIE_SATA#
CPU_DREFCLK
CPU_DREFCLK#
CPU_SSCDREFCLK CPU_SSCDREFCLK#
CLK_PCI_DDR_R
PCI4_SEL
ITP_EN
WWAN_CLKREQ#
FSB
FSC
FSA
H_STP_CPU#
H_STP_PCI#_R
FSA
CLK_PCIE_PCH
CLK_PCIE_PCH#
+3VM_1.5VM_R
CLK_PCH_48M<12>
CLK_PCH_14M<13>
VGATE<13,24,35>
H_STP_PCI#<13>
H_STP_CPU#<13>
CLK_PCI_PCH<11>
CLK_PCI_LPC<24>
CLK_SMBDATA <10,17>
CLK_SMBCLK <10,17>
CLK_CPU_BCLK# <7>
CLK_CPU_BCLK <7>
CLK_CPU_HPLCLK <7>
CLK_CPU_HPLCLK# <7>
CPU_DREFCLK <7>
CPU_DREFCLK# <7>
CPU_SSCDREFCLK <7>
CPU_SSCDREFCLK# <7>
PCH_SMBDATA<13>
PCH_SMBCLK<13>
CLK_PCI_DDR<17>
CLK_CPU_EXP# <6>
CLK_CPU_EXP <6>
CLK_PCIE_PCH <12>
CLK_PCIE_PCH# <12>
CLK_PCIE_LAN <22>
CLK_PCIE_LAN# <22>
WLAN_CLKREQ# <17>
LAN_CLKREQ# <22>
CLK_PCIE_WLAN# <17>
CLK_PCIE_WLAN <17>
CLK_PCIE_WWAN# <17>
CLK_PCIE_WWAN <17>
CLK_PCIE_SATA# <11>
CLK_PCIE_SATA <11>
WWAN_CLKREQ# <17>
CPU_BSEL1<7>
CPU_BSEL2<7>
CPU_BSEL0<7>
CLK_48M_CR<23>
+1.05VM_CK505
+3VM_CK505
+3VS
+1.05VS
+3VS
+3VS
+3VS
+3VS
+3VM_CK505
+1.05VM_CK505
+1.5VM_CK505
+3VS
+1.05VS
+1.05VS
+1.05VS
+3VS
+1.5VS
+1.5VM_CK505
+1.5VM_CK505
+3VM_CK505
+1.05VM_CK505
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
D
SCHEMATIC MB A6851
936Friday, September 02, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
401986
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
D
SCHEMATIC MB A6851
936Friday, September 02, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
401986
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
D
SCHEMATIC MB A6851
936Friday, September 02, 2011
2010/06/27 2011/6/27
Compal Electronics, Inc.
401986
For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#
For PCI4_SEL, 0 = Pin24/25 : DOT96 / DOT96#
Pin28/29 : LCDCLK / LCDCLK#
1 = Pin24/25 : SRC_0 / SRC_0#
Pin28/29 : 27M/27M_SS
Routing the trace at least 10mil
1000
CLKSEL1
0
PCI
MHz
266
SRC
MHz
CPU
MHz
CLKSEL2
33.30
FSA
CLKSEL0
FSC FSB REF
MHz
DOT_96
MHz
USB
MHz
14.318 96.0 48.0
0 1000 133 33.31 14.318 96.0 48.0
0 1001 200 33.30 14.318 96.0 48.0
0 1001 166 33.31 14.318 96.0 48.0
1 1000 333 33.30 14.318 96.0 48.0
1 1000 100 33.31 14.318 96.0 48.0
1 1001 400 33.30 14.318 96.0 48.0
111
Reserved
SA00003H610 (ICS :CS9LVRS387AKLFT MLF)
For PCI2_TME:0=Overclocking of CPU and SRC allowed
(ICS only) 1=Overclocking of CPU and SRC NOT allowed
PORT
SRC PORT LIST
REQ_3#
DEVICEPORT
REQ PORT LIST
REQ_4#
REQ_6#
REQ_7#
REQ_9#
REQ_10#
REQ_11#
REQ_A#
PEIC_WLAN
SRC10
SRC11
SRC6
SRC4
SRC0
DEVICE
SRC3
CPU_DREFCLK
SRC2
SRC7
SRC9
SRC8
PCIE_LAN
PCIE_WLAN
PCIE_SATA
PCIE_WWAN
PEIC_WWAN
250 mA
CPU_EXP
PCIE_PCH
PCIE_LAN
80 mA
7/13 Add 22pF to gnd and close to U3 for RF request
7/13 Add 33pFfor RF request
7/13 Add 33pF to GND for RF request
7/13 Add 33pF to GND for RF request
7/13 For RF request
7/13 For RF request
7/13 For RF request
7/21 Reserve 33pF to GND for RF request
7/21 Reserve 22pF to gnd and close to U3 for RF request
7/21 Reserve 33pFfor RF request
7/21 Change WWAN_CLKREQ# from REQ4 to REQ11
7/22 Add R241 pull up to +3VS for RF Intel request
7/22 Add R242 to R253 for Intel request
8/14 Add R250 pull up for Intel request
7/13 For RF request
8/24 Change net name to FSB for U3.2
8/27 Delete C93, C94, C95, C102 for low power CLK GEN
8/27 C303, C324, C325, C326, C327 to GND for RF request
7/21 Delete C296, C297 for RF request
Low power CLK Gen.
2010.03.09 Change Y1 to 5 x3.2 size
2010.03.23 Change R81 from bead to 0 ohm
2010.03.23 Change R477 from bead to 0 ohm
@
@
@
@
Stuff
Stuff
Stuff
Stuff
R477 @ Stuff
Normal Power Low Power
R478
R479
R480
R483
2010.07.12 RF request
R114
10K_0402_5%
R114
10K_0402_5%
1 2
R104
0_0402_5%
R104
0_0402_5%
1 2
C946
0.1U_0402_16V4Z
C946
0.1U_0402_16V4Z
1
2
R481
470_0402_5%
R481
470_0402_5%
12
C136
0.1U_0402_16V4Z
C136
0.1U_0402_16V4Z
1
2
R9110_0402_5% R9110_0402_5%
1 2
R10333_0402_5% R10333_0402_5%
1 2
R485
470_0402_5%
R485
470_0402_5%
12
C127
0.1U_0402_16V4Z
C127
0.1U_0402_16V4Z
1
2
R10833_0402_5% R10833_0402_5%
1 2
C146 22P_0402_50V8JC146 22P_0402_50V8J
1 2
R486
1K_0402_5%
R486
1K_0402_5%
12
C144 22P_0402_50V8JC144 22P_0402_50V8J
1 2
R487
0_0402_5%
R487
0_0402_5%
1 2
C137
0.1U_0402_16V4Z
C137
0.1U_0402_16V4Z
1
2
R81
0_0603_5%
R81
0_0603_5%
1 2
C133
47P_0402_50V8J
C133
47P_0402_50V8J
U4
RTM875N-397-GR
@
U4
RTM875N-397-GR
@
C126
10U_0805_10V4Z
C126
10U_0805_10V4Z
1
2
R10733_0402_5% R10733_0402_5%
1 2
C135
0.1U_0402_16V4Z
C135
0.1U_0402_16V4Z
1
2
C944
0.1U_0402_16V4Z
C944
0.1U_0402_16V4Z
1
2
R608
10K_0402_5%
R608
10K_0402_5%
1 2
C943
0.1U_0402_16V4Z
C943
0.1U_0402_16V4Z
1
2
R489
470_0402_5%
R489
470_0402_5%
12
R101 10K_0402_5%R101 10K_0402_5%
12
Y1
14.31818MHZ 20PF 7A14300003
Y1
14.31818MHZ 20PF 7A14300003
12
C941
33P_0402_50V8K
@C941
33P_0402_50V8K
@
1
2
R477
0_0603_5%
@
R477
0_0603_5%
@
1 2
C138
0.1U_0402_16V4Z
C138
0.1U_0402_16V4Z
1
2
C942
10U_0805_10V4Z
C942
10U_0805_10V4Z
1
2
C148 22P_0402_50V8JC148 22P_0402_50V8J
R83
2.2K_0402_5%
R83
2.2K_0402_5%
R115
10K_0402_5%
@
R115
10K_0402_5%
@
1 2
C134
10U_0805_10V4Z
C134
10U_0805_10V4Z
1
2
Q1B 2N7002DW-T/R7_SOT363-6Q1B 2N7002DW-T/R7_SOT363-6
3
5
4
C128
0.1U_0402_16V4Z
C128
0.1U_0402_16V4Z
1
2
C1067 56P_0402_50V8@C1067 56P_0402_50V8@
1 2
C947
47P_0402_50V8J
@
C947
47P_0402_50V8J
@
C141
47P_0402_50V8J
C141
47P_0402_50V8J
C1066 56P_0402_50V8@C1066 56P_0402_50V8@
1 2
R86
0_0402_5%
R86
0_0402_5%
1 2
C945
0.1U_0402_16V4Z
C945
0.1U_0402_16V4Z
1
2
R100 10K_0402_5%R100 10K_0402_5%
12
C139
0.1U_0402_16V4Z
C139
0.1U_0402_16V4Z
1
2
R65
10K_0402_5%
R65
10K_0402_5%
1 2
R112
10K_0402_5%
R112
10K_0402_5%
1 2
R484
1K_0402_5%
@R484
1K_0402_5%
@
12
R491
0_0402_5%
@R491
0_0402_5%
@
12
C145 22P_0402_50V8JC145 22P_0402_50V8J
1 2
R480
0_0603_5%
@ R480
0_0603_5%
@
1 2
U4
ICS9LVRS387AKLFT MLF
@ U4
ICS9LVRS387AKLFT MLF
@
CKPWRGD/PD#
1
FS_B/TEST_MODE
2
VSS_REF
3
XTAL_OUT
4
XTAL_IN
5
VDD_REF
6
REF_0/FS_C/TEST_
7
REF_1
8
SDA
9
SCL
10
NC
11
VDD_PCI
12
PCI_1
13
PCI_2
14
PCI_3
15
PCI_4/SEL_LCDCL
16
PCIF_5/ITP_EN
17
VSS_PCI
18
VDD_48
19
USB_0/FS_A
20
USB_1/CLKREQ_A#
21
VSS_48
22
VDD_IO
23
SRC_0/DOT_96
24
SRC_0#/DOT_96#
25
VSS_IO
26
VDD_PLL3
27
LCDCLK/27M
28
LCDCLK#/27M_SS
29
VSS_PLL3
30
VDD_PLL3_IO
31
SRC_2
32
SRC_2#
33
VSS_SRC
34
SRC_3
35
SRC_3#
36
VDD_CPU
72
CPU_0
71
CPU_0#
70
VSS_CPU
69
CPU_1
68
CPU_1#
67
VDD_CPU_IO
66
CLKREQ_7#
65
SRC_8/CPU_ITP
64
SRC_8#/CPU_ITP#
63
VDD_SRC_IO
62
SRC_7
61
SRC_7#
60
VSS_SRC
59
CLKREQ_6#
58
SRC_6
57
SRC_6#
56
VDD_SRC
55
PCI_STOP#
54
CPU_STOP#
53
VDD_SRC_IO
52
SRC_10#
51
SRC_10
50
SLKREQ_10#
49
SRC_11
48
SRC_11#
47
CLKREQ_11#
46
SRC_9#
45
SRC_9
44
CLKREQ_9#
43
VSS_SRC
42
CLKREQ_4#
41
SRC_4#
40
SRC_4
39
VDD_SRC_IO
38
CLKREQ_3#
37
VSS
73
R478
0_0603_5%
@ R478
0_0603_5%
@
1 2
R9210_0402_5% R9210_0402_5%
1 2
C129
0.1U_0402_16V4Z
C129
0.1U_0402_16V4Z
1
2
C147 22P_0402_50V8JC147 22P_0402_50V8J
R82
FBMH1608HM601-T_0603
R82
FBMH1608HM601-T_0603
1 2
R483
0_0603_5%
@ R483
0_0603_5%
@
1 2
R482
2.2K_0402_5%
R482
2.2K_0402_5%
12
R490
10K_0402_5%
R490
10K_0402_5%
12
R479
0_0603_5%
@ R479
0_0603_5%
@
1 2
R113
10K_0402_5%
R113
10K_0402_5%
1 2
R427 0_0402_5%@R427 0_0402_5%@
1 2
R84
2.2K_0402_5%
R84
2.2K_0402_5%
R9333_0402_5% R9333_0402_5%
1 2
C868 22P_0402_50V8JC868 22P_0402_50V8J
1 2
C143 22P_0402_50V8JC143 22P_0402_50V8J
1 2
C940
33P_0402_50V8K
@C940
33P_0402_50V8K
@
1
2
R488
0_0402_5%
@R488
0_0402_5%
@
12
R99 10K_0402_5%R99 10K_0402_5%
12
Q1A
2N7002DW-T/R7_SOT363-6
Q1A
2N7002DW-T/R7_SOT363-6
6 1
2
Vista de página 8
1 2 3 4 5 6 7 8 9 10 11 12 13 14 ... 35 36

Comentários a estes Manuais

Sem comentários